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Viewing: ECE 6213 : Design of VLSI Circuits

Last approved: Fri, 10 Jun 2016 08:06:02 GMT

Last edit: Tue, 22 Sep 2015 16:29:58 GMT

Other Courses referencing this course

In The Catalog Prerequisites:

ECE 6214 : High-Level VLSI Design Methodology
School of Engineering and Applied Sciences
Electrical and Computer Engineering (ECE)
ECE
6213
Design of VLSI Circuits
Design of VLSI Circuits
Summer 2015
3
Course Type
Lecture
Default Grading Method
Letter Grade

No
No
ECE 6240
Corequisites

20

Frequency of Offering
Every Year
Term(s) Offered
Fall
Are there Course Equivalents?
No
 
No
Fee Type


No


Top-down ASIC/FPGA design methodology; modeling of VLSI circuits using HDL; behavioral, structural, and RTL modeling techniques; logic synthesis techniques; design verification plan and techniques. Students design and verify a final project using state of the art commercial VLSI CAD tools for ASIC and FPGA (Altera).
This course provides a top-down ASIC/FPGA design methodology including HDL modeling, simulation, and implementation. After completing the course, the student will be able to: model and simulate of digital system using hardware description language (HDL), synthesis of digital controller/system from register-transfer to higher level descriptions in HDL, explain the concept of static timing analysis, design for test, clock tree insertion, design verification, and floor planning issues, describe different methodologies in ASIC and FPGA design flows, design and implement the design concept and target to ASIC and FGPA board (Altera), debug and analysis a system with an on-board logic analyzer, and explain the advance insertion-based, gain-based and random-base design HDL flow.
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Course Attribute


Key: 2308